CHRISTIAN URRICARIET OPTICAL CONNECTIVITY
Intel OCI Chiplet
maximum yield. Integrating the laser and SOA at wafer-scale results in minimal coupling losses for improved performance, lower cost due to the lack of laser back-end, and greatly improved reliability compared to discrete lasers. An alternative approach to on-chip integrated lasers is to use an External Laser Source (ELS) where the lasers are independently packaged and connected to the PIC via multiple optical connectors and fiber assembly. This adds significant cost and complexity to the design, greatly increasing the transmitter output power needed, and typically requiring the use of specialized Polarization Maintaining Fiber (PMF). Although this approach may provide some heat management benefits in some implementations, we believe these will be more than offset by its disadvantages as well as by the improvements in fully integrated device performance and manufacturing process described later in this article. The second vector is the heterogeneous integration of the PIC with the EIC, using advanced packaging to create the die stack or chiplet. Heterogeneous integration decouples improvements implemented on the EIC from the PIC, and it allows leveraging Moore’s Law to use the best CMOS IC node suited for each application. Thirdly, tighter integration with the host CPU/GPU through system- level packaging co-designs that maximize yield by using known good components, which are themselves fully integrated and tested. The transition from direct attachment of a fiber pigtail to a pluggable, reusable optical connector will result in reflow- compatible assemblies and simplify system-level fiber management and handling. It enables the realization of the photonics-chiplet equivalent of the CMOS KGD concept: A complete optical I/O subassembly including laser sources and optical termination, which is tested and characterized before it flows downstream for integration with
high-value GPU packages. Intel Corporation has made a significant breakthrough in this space with the demonstration of a fully integrated OCI chiplet at OFC 2024. This first chiplet was shown co- packaged with an Intel CPU, running an error-free PCIe Gen5 link over fiber. It is designed to support 64 channels of 32 Gbps data transmission in each direction (4Tbps aggregate) over fiber optics up to 100 meters. The current chiplet’s energy efficiency of 5pJ/ bit is significantly lower than current pluggable optical transceiver modules. Looking ahead, Intel has an aggressive development roadmap to scale the performance of future OCI chiplets, with the potential to reach 32 Tbps bandwidth and a shoreline density greater than 1.5Tbps/mm in the next few years by increasing line rate per channel, wavelengths per fiber, number of fibers, and polarization modes. The technical challenges that need to be solved include thermal management, advanced package design, and power delivery. Intel is addressing these challenges by considering standardized die-to-die (D2D) electrical interfaces that facilitate integration with a variety of hosts. The company is also working on improving the performance and reducing the device size (which directly impacts the economics significantly) and power consumption in future OCI chiplets through more advanced designs and the implementation of next-generation manufacturing process nodes for both the PIC and the EIC. Intel’s leadership in silicon photonics is well established, with over 25 years of research and development leading to the shipping of many millions of silicon photonics-based connectivity products into the hyperscale cloud data centers with proven high reliability (<0.1 laser FIT). Our mature platform has demonstrated the ability to increase functionality on-chip through increased component integration, from less than 100 devices/PIC in 2016 to about 2,000
devices/PIC today. The company’s integration approach of using hybrid laser-on-wafer technology results in higher reliability and lower costs, setting Intel apart from the capabilities of most competitors. The path to fully implementing integrated optical connectivity solutions in AI clusters is not without challenges. Reducing the cost of optical components and efficiently integrating these solutions into existing data center infrastructure requires ongoing investment and effort. However, the current technology path promises to revolutionize the training and inference of LLMs by overcoming the limitations of current hardware and infrastructure, leading to unprecedented advancements in AI.
Christian Urricariet is Senior Director of Product Marketing for Integrated Photonics Solutions at Intel. For more information, visit www.intel.com/siliconphotonics
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ISSUE 38 | Q3 2024
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