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Intel shows OCI optical I/O chiplet co-packaged with CPU at OFC2024, enabling massive AI infrastructure scaling Explosive AI infrastructure growth is bringing high bandwidth density and low power performance requirements to compute architectures which optical connectivity is well positioned to support. At OFC2024 in San Diego, Intel demonstrated its advanced Optical Compute Interconnect (OCI) chiplet co-packaged with a prototype of a next-generation Intel CPU running an error-free link, giving the industry a look at the future of high-bandwidth compute interconnect.
A pplications using AI are increasingly being deployed and positioned to drive our global economy and influence the evolution of our society in general. Recent developments in large language models (LLM) and Generative AI have only accelerated that trend. Larger and more efficient Machine Learning (ML) models will play a key role in addressing the emerging requirements of AI acceleration workloads. The need to significantly scale future compute fabrics drives exponential growth in I/O bandwidth and longer reach in connectivity to support larger xPU clusters and architectures with more efficient resource utilization, such as GPU disaggregation and memory pooling. Electrical I/O (i.e., copper connectivity) supports high bandwidth density and low power, but only very short reaches of <1 meter. Pluggable optical transceiver modules used in current data centers and early AI clusters can increase reach but at cost and power levels that are not sustainable with the scaling requirements for AI workloads immediately ahead of us. A co-packaged xPU (CPU, GPU, IPU) optical I/O solution can support higher bandwidths with high power efficiency, low latency, and longer reach, which is what AI/ML infrastructure scaling requires. Intel has developed a 4 Tbps bidirectional fully integrated OCI chiplet based on Intel’s in-house Silicon Photonics technology, to address the AI infrastructure’s tremendous need for bandwidth and to enable future scalability. This OCI chiplet or tile contains a single Silicon Photonics Integrated Circuit (PIC) with integrated lasers and SOAs, an electrical IC, and a path to incorporate a detachable/re-usable optical connector.
and other System-On-a-Chip (SOCs) with high bandwidth demand. This first implementation paves the way toward providing multi-Terabit optical connectivity with a >4x improvement in shoreline density over PCIe Gen6, an energy efficiency of <3pJ/bit, <10ns (+TOF) of latency, and a reach greater than 100 meters. At OFC 2024, Intel demonstrated its first- generation OCI chiplet co-packaged with a concept Intel CPU running an error-free link over fiber (BER <10E-12 with a PRBS31 pattern). This first OCI implementation is a 4 Tbps bidirectional chiplet compatible with PCIe Gen5, supporting 64 lanes of 32 Gbps data in each direction over 10’s of meters, realized as eight fiber pairs each carrying eight DWDM wavelengths. Looking beyond this first device, the platform has line of sight to 32 Tbps chiplets. The single PIC in the current die-stack can support up to 8 Tbps bidirectional applications and it contains a complete optical sub-system, enabled by Intel’s unique capability of integrating DWDM laser arrays and optical amplifiers on the PIC, providing orders of magnitude of higher reliability than conventional InP lasers. These integrated Silicon Photonics chips are manufactured at one of Intel’s high-volume fabs in the US, which has already shipped more than 8 million PICs with over 32 million on-chip lasers embedded in pluggable optical transceivers for data center networking,
with industry-leading reliability. The on- chip laser technology enables true wafer- scale manufacturing, burn-in, and testing, which translates into high subsystem- level simplicity and reliability (e.g., there are no fibers connecting the External Laser Source and PIC) and manufacturing efficiencies. An additional differentiating advantage is that OCI uses standard, widely deployed single-mode fiber (SMF-28), without requiring Polarization Maintaining Fiber (PMF) like other technical approaches in the market. PMF has been rarely deployed, as system vibration and fiber wiggle can negatively affect its performance and associated link budget. Intel’s field-proven Silicon Photonics technology and platform can provide the highest performance and most reliable optical connectivity solutions to make ubiquitous AI possible. Additionally, Intel is well-positioned to offer a complete next-generation compute solution with its leading silicon, optical, packaging, and platform integration capabilities.
For more information: www.intel.com/siliconphotonics
The OCI chiplet can be co-packaged with next-generation CPU, GPU, IPU,
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ISSUE 37 | Q2 2024
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