IMAPS Advancing Microelectronics 2020 Issue 3 (Advanced SiP)

A D V A N C I N G MICROELECTRONICS

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Si integration solutions for chiplets ASE has developed and offers a wide portfolio of Si level integration technology solutions, from low density to high density chiplets integration including FCMCM (Flip-chip multi-chip-module), FOCoS (Fanout chip on substrate) and 3D IC. The advanced FOCoS technology can provide short die to die connection and high interconnections (10,000’s) with RDL (redistribution layer) small line/space (L/S) 2/2um up to 4 layers for Chip First and Chip Last packaging processes. It also produces a lower cost solution with improved electrical performance compared to 2.5D Si interposer solution due to the elimination of Si TSV process and reduced insertion loss. ASE is evolving this ad - vanced packaging platform to meet application demands for HPC and AI/ML applications.

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