IMAPS Advancing Microelectronics 2020 Issue 3 (Advanced SiP)

ADVANC ED S i P 2 0 2 0

Optical As massive amounts of data are processed, it must all be transmitted to and through large data centers. Transmission through copper interconnect uses massive amounts of power, which is a big and growing problem for data center operators. Deployment of silicon photonics for traffic inside the data center, to the server boards, and eventually directly to the network switch components will have a dramatic effect on overall power reduction, and this is a big driver for implementing optical interconnect. In addition, switching bandwidth of 50Tbps will be enabled, which massively increases data throughput.

Power Delivery Power consumption for high performance processors, FPGAs, and ASICs continues to increase as overall device switching speeds continue to rise. As transistors shrink in finer lithography nodes, lower operating voltages required. With the number of cores increasing, it is imperative to have ample power supplied to the chip to avoid voltage droop, to ensure functionality between the processor, memory and other functional elements of the packaged sub - system, all which optimize the performance. New approaches to power deliver are being developed in the areas of wafer level solutions (trench capacitors), package level solutions (embedded capacitive and inductive elements in the substrate), and system level solutions (integrated power modules). All of these approaches are viable and bring the necessary current at specified voltages close to the processor, thus increasing the power deliver efficiency and reducing overall power required. These power delivery approaches also reduce the amount of power circuitry on the Looking into the future, all of these key developments in packaging that create higher performance systems that utilize less power will be deployed. The end result will be to produce system performance that continues the trend of Moore’s Law, albeit in a different way than with previous total reliance on semiconductor chip lithography and SOC integration. At ASE, we strive to work closely with our customers to create the necessary IC packaging and system level solutions to make this a reality. system board, reducing board space and cost. HPC/AI Compute Platform of the Future

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